Acceptor - An element,such as boron,indium,and gallium used to create a free hole in a semiconductor.The acceptor atoms are required to have one less valence electron than the semiconductor.
受主——一种用来在半导体中形成空穴的元素，比如硼、铟和镓。受主原子必须比半导体元素少一价电子。
Alignment Precision - Displacement of patterns that occurs during the photolithography process.
套准精度——在光刻工艺中转移图形的精度。
Anisotropic - A process of etching that has very little or no undercutting
各向异性——在蚀刻过程中，只做少量或不做侧向凹刻。
Area Contamination - Any foreign particles or material that are found on the surface of a wafer. This is viewed as discolored or smudged, and it is the rest of stains, fingerprints, water spots, etc.
沾污区域——任何在晶圆片表面的外来粒子或物质。由沾污、手印和水滴产生的污染。
Azimuth, in Ellipsometry - The angle measured between the plane of incidence and the major axis of the ellipse.
椭圆方位角——测量入射面和主晶轴之间的角度。
Backside - The bottom surface of a silicon wafer. (Note: This term is not preferred; instead, use ‘back surface’.)
背面——晶圆片的底部表面。（注：不推荐该术语，建议使用“背部表面”）
Base Silicon Layer - The silicon wafer that is located underneath the insator layer, which supports the silicon film on top of the wafer.
底部硅层——在绝缘层下部的晶圆片，是顶部硅层的基础。
Bipolar - Transistors that are able to use both holes and electrons as charge carriers.
双极晶体管——能够采用空穴和电子传导电荷的晶体管。
Bonded Wafers - Two silicon wafers that have been bonded together by silicon dioxide, which acts as an insating layer.
绑定晶圆片——两个晶圆片通过二氧化硅层结合到一起，作为绝缘层。
Bonding Interface - The area where the bonding of two wafers occurs.
绑定面——两个晶圆片结合的接触区。
Buried Layer - A path of low resistance for a current moving in a device. Many of these dopants are antimony and arsenic.
埋层——为了电路电流流动而形成的低电阻路径，搀杂剂是锑和砷。
Buried Oxide Layer (BOX) - The layer that ins*不良词语
*ates between the two wafers.
氧化埋层(BOX)——在两个晶圆片间的绝缘层。
Carrier - Valence holes and conduction electrons that are capable of carrying a charge through a solid surface in a silicon wafer.
载流子——晶圆片中用来传导电流的空穴或电子。
Chemical-Mechanical Polish (CMP) - A process of flattening and polishing wafers that utilizes both chemical removal and mechanical buffing. It is used during the fabrication process.
化学-机械抛光(CMP)——平整和抛光晶圆片的工艺，采用化学移除和机械抛光两种方式。此工艺在前道工艺中使用。
Chuck Mark - A mark found on either surface of a wafer, caused by either a robotic end effector, a chuck, or a wand.
卡盘痕迹——在晶圆片任意表面发现的由机械手、卡盘或托盘造成的痕迹。
Cleavage Plane - A fracture plane that is preferred.
解理面——破裂面
Crack - A mark found on a wafer that is greater than 0.25 mm in length.
裂纹——长度大于0.25毫米的晶圆片表面微痕。
Crater - Visible under diffused illumination, a surface imperfection on a wafer that can be distinguished individually.
微坑——在扩散照明下可见的，晶圆片表面可区分的缺陷。
Conductivity (electrical) - A measurement of how easily charge carriers can flow throughout a material.
传导性（电学方面）——一种关于载流子通过物质难易度的测量指标。
Conductivity Type - The type of charge carriers in a wafer, such as “N-type” and “P-type”.
导电类型——晶圆片中载流子的类型，N型和P型。
Contaminant, Partic*不良词语
*ate (see light point defect)
污染微粒（参见光点缺陷）
Contamination Area - An area that contains particles that can negatively affect the characteristics of a silicon wafer.
沾污区域——部分晶圆片区域被颗粒沾污，造成不利特性影响。
Contamination Partic*不良词语*ate - Particles found on the surface of a silicon wafer.
沾污颗粒——晶圆片表面上的颗粒。
Crystal Defect - Parts of the crystal that contain vacancies and dislocations that can have an impact on a circuit’s electrical performance.
晶体缺陷——部分晶体包含的、会影响电路性能的空隙和层错。
Crystal Indices (see Miller indices)
晶体指数（参见米勒指数）
Depletion Layer - A region on a wafer that contains an electrical field that sweeps out charge carriers.
耗尽层——晶圆片上的电场区域，此区域排除载流子。
Dimple - A concave depression found on the surface of a wafer that is visible to the eye under the correct lighting conditions.
表面起伏——在合适的光线下通过肉眼可以发现的晶圆片表面凹陷。
Donor - A contaminate that has donated extra “free” electrons, thus making a wafer “N-Type”.
施主——可提供“自由”电子的搀杂物，使晶圆片呈现为N型。
Dopant - An element that contributes an electron or a hole to the conduction process, thus altering the conductivity. Dopants for silicon wafers are found in Groups III and V of the Periodic Table of the Elements.
搀杂剂——可以为传导过程提供电子或空穴的元素，此元素可以改变传导特性。晶圆片搀杂 剂可以在元素周期表的III和V族元素中发现。
Doping - The process of the donation of an electron or hole to the conduction process by a dopant.
掺杂——把搀杂剂掺入半导体，通常通过扩散或离子注入工艺实现。
Edge Chip and Indent - An edge imperfection that is greater than 0.25 mm.
芯片边缘和缩进——晶片中不完整的边缘部分超过0.25毫米。
Edge Exclusion Area - The area located between the fixed quality area and the periphery of a wafer. (This varies according to the dimensions of the wafer.)
边缘排除区域——位于质量保证区和晶圆片外围之间的区域。（根据晶圆片的尺寸不同而有所不同。）
Edge Exclusion, Nominal (EE) - The distance between the fixed quality area and the periphery of a wafer.
名义上边缘排除(EE)—— 质量保证区和晶圆片外围之间的距离。
Edge Profile - The edges of two bonded wafers that have been shaped either chemically or mechanically.
边缘轮廓——通过化学或机械方法连接起来的两个晶圆片边缘。
Etch - A process of chemical reactions or physical removal to rid the wafer of excess materials.
蚀刻——通过化学反应或物理方法去除晶圆片的多余物质。
Fixed Quality Area (FQA) - The area that is most central on a wafer surface.
质量保证区(FQA)——晶圆片表面中央的大部分。
Flat - A section of the perimeter of a wafer that has been removed for wafer orientation purposes.
平边——晶圆片圆周上的一个小平面，作为晶向定位的依据。
Flat Diameter - The measurement from the center of the flat through the center of the wafer to the opposite edge of the wafer. (Perpendicar to the flat)
平口直径——由小平面的中心通过晶圆片中心到对面边缘的直线距离。
Four-Point Probe - Test equipment used to test resistivity of wafers.
四探针——测量半导体晶片表面电阻的设备。
Furnace and Thermal Processes - Equipment with a temperature gauge used for processing wafers. A constant temperature is required for the process.
炉管和热处理——温度测量的工艺设备，具有恒定的处理温度。
Front Side - The top side of a silicon wafer. (This term is not preferred; use front surface instead.)
正面——晶圆片的顶部表面（此术语不推荐，建议使用“前部表面”）。
Goniometer - An instrument used in measuring angles.
角度计——用来测量角度的设备。
Gradient, Resistivity (not preferred; see resistivity variation)
电阻梯度（不推荐使用，参见“电阻变化”）
Groove - A scratch that was not completely polished out.
凹槽——没有被完全清除的擦伤。
Hand Scribe Mark—A marking that is hand scratched onto the back surface of a wafer for identification purposes.
手工印记——为区分不同的晶圆片而手工在背面做出的标记。